1. Field of the Invention
The present invention relates to semiconductor devices. More particularly, the present invention relates to a semiconductor device which is provided with a power supply system which supplies electric power to a semiconductor integrated circuit.
Priority is claimed on Japanese Patent Application No. 2008-13559, filed Jan. 24, 2008, the content of which is incorporated herein by reference.
2. Description of Related Art
The inventors of the present invention investigated the following techniques in the art of semiconductor devices.
In the art of semiconductor devices, it is becoming considerably difficult to design measures against power supply noise as with succeeding generations of LSIs (Large Scale Integrated circuits). Such difficulty is caused by an increase in current consumption of semiconductor elements which are required to operate at a high rate; an increase in power supply noise accompanied by the high speed operation of the semiconductor elements; and minimization of a noise margin due to a reduction in a power supply voltage accompanied by an advance in semiconductor processes. Under such circumstances, in view of the fact that voltage is a product of current and impedance, one of the solutions for controlling the voltage of power supply noise so as to be a lower voltage is to minimize the impedance value of a power supply system over a wide band. In order to realize such an impedance minimization over a wide band, a number of different kinds of decoupling capacitors have been mounted on a printed circuit board or arranged in a semiconductor package. This is because different kinds of decoupling capacitors have different resonance frequencies and the impedance values thereof are minimized at these resonance frequencies.
For example, in Japanese Unexamined Patent Application, First Publication No. 2002-223077 hereinafter referred to as “Patent Document 1”), a number of capacitors are provided in a multilayer wire substrate so that the impedance value of a power supply system at a anti-resonance frequency is less than or equal to a predetermined value, thereby realizing a low impedance value over a wide band.
In addition, in Japanese Unexamined Patent Application, First Publication No. 2001-119110 (hereinafter referred to as “Patent Document 2”), the lengths of power supply lines provided for a number of decoupling capacitors are controlled so as to precisely control impedance profiles thereof, thereby realizing a low impedance value over a wide band.
The inventors of the present invention recognized the following matters. Specifically, the inventors of the present invention studied the aforementioned techniques for semiconductor devices, and revealed the following matters.
Since both of these techniques require a number of capacitors, the number of layers of substrates increases and the sizes of the substrates increase.
The techniques of realizing low power supply noise set forth above may be effective methods for semiconductor devices provided in apparatuses such as a personal computer, which is provided with a printed circuit board having a sufficiently large size.
However, these methods cannot apply to printed circuit boards which are provided in small-sized semiconductor devices such as a mobile phone. Specifically, since electronic components other than capacitors are densely provided in small-sized semiconductor equipment, printed circuit boards does not have sufficient space for the capacitors, and hence the number of chip capacitors that can be provided therein is restricted.